Frequency converter



Oct. 6, 1964 R. PEASLEE FREQUENCY CONVERTER 12 Sheets-Sheet 1 Filed Aug.'7. 1961 ATTORNEY FREQUENCY CONVERTER Filed Aug. '7, 1961 l2Sheets-Sheet 2 FIG. I2

|2v `22,4 aooxzsz 224s 220 47K gg 47K INVENTOIL LAWRENCE R.PEASLEEATTORNEY Oct. 6, 1964 I L. R. PEAsLEE 3,152,297

E FREQUENCY CONVERTER Filed Aug. 7. 1961 l2 Sheets-Shoe*I 3 FIG 3 FlG 4bSUMMER FIG. 4a

INTEGRATOR P i i 1 b n @M'AY- 55 3 H -r-fl -P-YIZ rRl wr- YH r T T' T lINVENTOR LAWRENCE RPEASLEE ATTORNEY 12 Sheets-Sheet 4 Filed Aug. 7. 1961Oct. 6, 1964 l.. R. PEASLEE FREQUENCY CONVERTER 12 Sheets-Sheet 5 FiledAug. 7, 1961 x oom m/omm INVENTOR. LAWRENCE R. PEAS LEE mnozu Lm- C. ,.8um Q24 *Hg om GSE Tl u u Al n..- muzmmh mm .0E

nzh udmlne- QUI mtmsm un QOH Il ATTORNEY Oct. 6; 1964 R. PYEASLEE3,152,297

FREQUENCY CONVERTER Filed Aug. '7. 1961 l2 Sheets-Sheet 6 INVENTOR.LAWRENCE RPEASLEE EGULATOR FIGQL:

ATTQRNEY Oct. 6, 1964 L. R. PEAsLl-:E

FREQUENCY CONVERTER 12 Sheets-Sheet '7 Filed Aug. 7, 1961 INVENTOR.LAWRENCE R.PEAS\ EE MMM hmm ATTORNEY L. R. PEASLEE FREQUENCY CONVERTER12 Sheets-Sheet 8 INVENTOR. LAWRENCE R. PEASLEE ATTORNEY Oct. 6, 1964Filed Aug. 7, 1961 Oct. 6, 1964 L. R. PEASLEE 3,152,297

FREQUENCY CONVERTER Filed Aug. '7, 1961 12 Sheets-3h88?l 9 TOR PHASE BPHASE C PHAsE c FROM FROM OSCILLATOR OSCILLATOR NING CIRCUIT CIRCUITLTER LTER INVENTOR F|G.I3 LAWRENCE R. PEASLEE FIG-I7 F|G.|4 '7 BY FIGJ5M- ATTORNEY Oct. 6, 1964 L. R. PEAsLl-:E

FREQUENCY CONVERTER 12 Sheets-Sheet l0 Filed Aug. 7. 1961 ATTORNEY 12Sheets-Sheet ll Filed Aug. '7, 1961 SUPPLY HALF WAVE FIG. l9a

FIRING POINT 0 w O DA a w. E PE Pm m AV T E E V D E me n mi mw Ow C SIVI II b G F OFFSET F|R|NG POINT l FIG. |96

I I i GATE TH RESHOLD I FIRING POINT I FIG.I9d

INVENTOR. LAWRENCE R. PEASLEE *GATE THRESHOLD ATTORNEY Oct. 6, 1964 R.PEASLEE FREQUENCY CONVERTER l2 Sheets-Sheet 12 Filed Aug. 7, 1961LAWRENCE R PEASLEE ATTORNEY 2H .msm .QQ i .ONNE

United States Patent O 3,152,297 FREQUENCY CONVERTER Lawrence R.Peaslee, Waynesboro,I Va., asslgnor to General Electric Company, acorporation of New York Filed Aug. 7, 1961, Ser. No. 129,646

11 Claims. (Cl. 321-61) This invention relates to frequency convertersystems. More particularly, it relates to a system for providing anoutput having a range of determinate frequencies from a variable speedsource.

In many situations such as aircraft systems or other arrangementswherein an engine whose speed Varies over a wide range is utilized topower an electric generator, it has been desirable to obtain a constantfrequency output having a chosen range of determinate frequencies fromthe variable speed source providedby such engine. Heretofore, the mostwidely used device for this purpose has been a hydraulic constant speeddrive which is essentially a hydraulic generator-motor system thatutilizes either a variable displacement generator or a motor incontinuously variable ratio over a requisite input speed range.

Such transmissions which are in general use today are quite complex andrequire extreme precision of moving parts together with associatedpiping and cooling systems. In addition, the lives of such systems arerelatively short and .considerable maintenance thereof is required.Also, overhead costs of such systems are high and development costs fornew ratings and speed ranges plus the production costs thereof are quiteexpensive. The speed limitations of these systems serve to inhibit thede- `velopment of lighter weight systems.

It is, accordingly, an important object of this invention to provide anall-electrical system for converting the indeterminate variable shaftspeed provided by `an engine or other energy source to an electricaloutput having a chosen range of determinate frequencies.

It is a further object to provide a system in accordance with thepreceding object which is relatively light in weight and has arelatively large power handling capacity.

it is another object to provide a system in accordance with `thepreceding objects wherein considerable flexibility and selection ofinput speed range and output frequency is enabled and wherein theefficiency of the system is high.

Generally speaking and in accordance with the invention, there `areprovided in combination, first means to produce a plurality of likeoutputs equally displaced in phase and having an indeterminate variablefrequency, a source of reference voltage having a given range ofdeterminable frequencies, the highest frequency of the range generallybeing less than the lowest frequency of the outputs and second means incircuit with the reference voltage source and the first means for mixingthe outputs and the reference voltage. There are also included thirdmeans in circuit with the first means to produce first signal conditionsin response to half cycles of one polarity of the outputs and secondsignal conditions in response to half cycles of the opposite polarity ofthe outputs and fourth means in circuit with the second and third meansfor producing first and second signals during such signal conditions inresponse to the application of the resultant of the mixing of theoutputs and the reference voltage` Means are further included to combinethe signals to produce an output having the frequency of the referencevoltage.

The features of 'this invention which are believed to be new are setforth with particularity in the appended claims. The invention itself,however, may best be understood by reference to the followingdescription when taken in conjunction with the accompanying drawingswhich Patented Oct. 6, 1964 'ice show embodiments of a frequencyconverter according to the invention.

In the drawings,

FIG. 1 is a block diagram of a system in accordance with the invention;

FIG. 2 is a diagram conveniently utilized for explaining the inventiveconcept of the system;

FIG. 3 is a block depiction of an arrangement for providing outputsignals in accordance with a simulated embodiment of the system;

FIGS. 4oz-4c are depictions of the circuit symbols utilized in FIG. 3;

FIG. 5 is a diagram of a portion of a modulator which is utilized inthepsimulated embodiment;

FIG. 6 is a diagram useful in explaining the operation of the system ofFIG. 5;

FIGS. 7-12 are schematic diagrams of circuits utilized in the modulatorof FIG. 5; and

FIGS. 1346 taken together as in FIG. 17 is a diagram of anotherembodiment of the system;

FIG. 18 is a depiction of a waveform useful in explaining the operationof the invention;

FIGS.'19a-19d comprise a timing diagram of waveforms useful inexplaining the operation of the invention;

FIGS. 20 and 21 illustrate the feedback feature of the invention;

FIGS. 22a-22e comprise a timing diagram of waveforms which occur in theoperation of the embodiment depicted in FIGS. 13-17; and

FIG. 23 is a logical diagram depicting the operation of the embodimentshown in FIGS. 1.3-17.

Referring now to FIG. 1 wherein there is shown an embodiment of a systemin accordance with the invention, a generator 10 in response to theapplication thereto of the variable speed power from shaft 12 produces athree phase output, viz., phases el, e2 and e3 having a frequency inaccordance with the speed of shaft 12. The field winding 14 of generator10 is excited by an exciter 16 which may suitably be of the static type,there being fed back to a voltage regulator contained in exciter 16, thephase e1, e2 and e3 outputs of the generator 1t) to provide there- `byvoltage regulation of the outputs of generator 1t).

For providing three outputs from the system which are equally displacedin phase, viz., phases A, B and C, 'a modulator and a frequencyconversion stage are provided for producing each output. Thus, for phaseA, there are provided a modulator 18 and a frequency conversion stage20. For phase B, there yare provided a modulator 22 and a frequencyconversion stage 24, and for phase C, there are provided a modulator 26and a frequency conversion stage ZS. An oscillator and phase splitter 30having a three phase output of a given range of determinable frequenciesprovides a reference frequency voltage for modulators 18, 22 and 26.

In the frequency conversion stages 20, 24 and 28, there are includedpower switching deviceswhich are rendered conductive in response toswitching Signals respectively applied thereto to perform the frequencyconversions in the system. The outputs 'of the frequency conversionstages 20, 24 and 28 are combined in combiners 32, 34 and 436,respectively. Since the unfiltered outputs of the combiners containcomponents having undesired frequencies, the output filters 38, 40 and42 substantially remove such undesired components.

In the modulators, one of the respective phase outputs of oscillator 30is mixed with the three phase outputs of generator 1t) to provide theproper switching signals `for the power switching devices' in thefrequency conversion stages respectively. The exciter regulator 16functions to control the excitation in generator 10 so that the propervoltages are applied `to the frequency converters.

Gscillator stage contains an oscillator, the frequency of the output ofwhich determines the frequency of the output of the system. The threebalanced phase outputs from oscillator stage 30 are derived by means ofa phase splitter or like device, which determines the system phasedisplacement and phase sequence. The frequency of generator It? issuitably chosen to be about 4 to 20 times the oscillator frequency.

Analog feedbacks of the respective system phase outputs to thecorresponding modulators serve to reduce distortion of the output of thesystem and also to provide a degree of voltage regulation.

In the frequency conversion stages, a plurality of first switchingdevices is controlled by the positive half cycles of the outputs ofgenerator 10 and another such plurality of second switching devices iscontrolled by the negative half cycles of the outputs of generator iti.The restraining circuits 44, 46 and 4S serve to insure that nocommutation occurs between the respective first and second pluralitiesof switching devices in an associated frequency conversion stage unlessthe current in the output of the associated combiner is passing throughor already has passed through the zero crossover point. The currents inthe outputs of combiners 32, 34 and 36, respectively, are sensed bycurrent transformers 50, 52 and 54, the current in transformers 5t), S2and 5d being fed to restraining circuits 44, i6 and 48 respectively.

In FIG. 2, there is shown a circuit which depicts the circuitrelationships in one phase of the system of the invention. In thiscircuit, the generators 57, 39, 41 produce the three outputs 120displaced in phase with respect to each other, each output, viz.,voltages e1, e2 and e3 having the same varying frequency. The seriesinductance lm represents the total commutating inductance of the system.The normally open relay contacts R1, R2 and R3 which represent thenonconductive conditions of the switching devices in a frequencyconversion stage of FIG. l, when they assume the closed position, switchthe output of the system from one generator phase to another as effectedby gating signals applied to the switching devices (not shown)respectively associated with contacts R1, R2 and R3.

In the operation of the circuit of FIG. 2, the switching devicesassociated with contacts R1, R2 and R3, respectively, are energized inaccordance with the output of a modulator (FIG. 5) wherein the threebalanced generator voltages el, e2, e3 are mixed with a referencevoltage having a determinate frequency. Preferably the frequency of thereference voltage is such that the range of frequencies of the generatorvoltages is about from four to twenty times as great thereof. Of course,three reference voltages are provided where there are three frequencyconverter stages and are equally displaced in phase with respect to eachother as are the generator voltages, the mixing occurring in each phasein the modulator between the three phase generator voltages and one ofthe reference voltage phases.

The output passed through alternately closed contacts R1, R2 and R3 isfiltered through filter inductance l and capacitance C and developedacross load inductance L and resistance R to provide the output voltagee0 for a system phase output.

In the circuit of FIG. 2, in the relationships obtaining therein, asshown hereinbelow, classical notation rather than operational notationis utilized to more directly preserve identifrcation between measuredquantities and the physical components of the actual system. Therelationships are:

e1=e1 sin Zaffgt; 62:02@ eazael; a=e3120 where fg=generator frequencye0=e0 sin 21rf0t where fozoutput frequency loading element.

with no amortisseurs (generator transient inductance) Zm'l withamortisseurs (generator sub-transient inductance) I=iilter inductanceL=load inductance Czfilter capacitance r=equivalent resistance of thecore loss in inductance l Rzload resistance The current equations of thesystem are:

Eifer-godi on #Hw-entit (fr-e0) 1 =l eOdt-l-C'-o-i-eo (c) where e-:eb e2or e3 whichever is connected to the filter input at the time considered.

Equation a represents the current flowing in the generator and mayconsist of: no currents, current in one phase or current in two phasesdepending upon the condition of the system at the time considered.Equation b represents the sums of the currents flowing through theinductance and resistance branches, l and r of FIG. 2. Equation crepresents the total current flow into the shunt branches C, R and L inFIG. 2.

When Equations a and b are solved simultaneously, there results:

and when Equations b and c are solved simultaneously, there results:

In FIG. 3, there is shown a circuit for producing the three balancedgenerator voltages el, e2 and e3 and output voltages e0 and e' as setforth in Equations d and e. In FIGS. 4a, 4b and 4c, there are shown thesymbols utilized in depicting the system elements in the circuit of FIG.3.

In the circuit of FIG. 3, Equation d is represented by integrators 58,60, 62 and 66 and summers 64- and 68. The outputs of integrators 58, 6)and 62 are respectively equal to the currents in phases el, e2 and e3multiplied by the factor r (FIG. 2). The output of integrator 66 is thefactor r times the current in the inductive branch of the series filterinductor l (FIG. 2), and the current in the resistive branch of theseries filter is the factor times the difference between e' and e0. putvoltage is e0.

Equation e is represented in FIG. 3 by integrators 76 and S6 and summer78. The potentiometers 49, 51, 53, 65, 70, 72, 74, Sti, 82 and 84 may beutilized in varying the system loading with each potentiometer being aIntegrators 43 and 47, together with summers 45', 55 and 56 provide thethree phase voltage source, viz., voltages e1, e2 and e3.

In FIG. 5, there is shown a portion of a modulator circuit which may beutilized with the computer circuit of FIG. 3. The `circuit of FIG. 5essentially has two functions, viz., the supplying of the necessaryinformation to fire the simulated switching devices therein (siliconcontrolled rectifiers being the type of devices that are simulated),according to a predetermined schedule (as modied by an anolog feedbacksignal) and to provide additional logic to the simulated siliconcontrolled recti- The system outin FIGS. 19a-d.

ers whereby they properly perform all the functions of siliconcontrolled rectifiers.

In this figure, the output of one phase of a polyphase variablefrequency oscillator 90, which can be conveniently designated as voltageef, is applied through a resistor 92 as one input to a D.C. amplifier96. Also, applied through resistors 93 and 95 as inputs to D.C.amplifier 96 are the generator phase outputs e1 and e3. Resistor 93 ischosen to have a value which is twice the value of resistors 952 and 95.Since signals e1 and e3 are 120 displaced in phase with respect to eachother, the output of amplifier 96 may be conveniently designated as--eM=-ef-cos el. LIn FIG. 18 there is shown the wave shape of the signaleM. In this wave shape, if the amplitude of the output of the oscillatorwave is taken to have a value of one, then the amplitude of thegenerator voltage superimposed thereon is one-half. The positive gatethreshold line in FIG. 18 also has an amplitude of one-half andindicates the voltage level above which a silicon controlled rectifiercontrolled by a positive half cycle of generator voltage is switchedinto conductivity. The line in FIG. 18 designated negative gatethreshold indicates the voltage below which a silicon controlledrectifier controlled by the negative half cycles of generator output isswitched into conductivity.

It is to be noted that the generator signal superimposed on theoscillator signal in FIG. 18 is a cosinusoid. This is readilyappreciated that from the fact that since el and `e3 are 120 displacedin phase with respect to each other and since the value of resistor 93is twice that of resistor 95, the summing in amplifier 96 provides thecosinusoid of the e1 voltage.

Prior to describing the remainder of the modulator of FIG. 5, it is tobe realized that the purpose of this modulator is to construct a firingschedule which will produce the best sine wave power output for a givenkfilter or, conversely, to produce a sine wave of a given qualitywiththe least filtering. In this connection, it is to be noted that thefilter itself is not the only part affected. Thus, if the filter seriesinductance increases in size, the generator must also increase in sizeto supply the added voltage drop across such inductance.

It has been found that if the generator output is directly superimposedon the reference oscillator wave, in the event that there are presentdifferent power factors in the generator output, the sine waves from thegenerator superimposed upon the oscillator wave are distorted.Accordingly, it is first desired to vary the firing angle of theswitching device as a function of the instantaneous height of the firingcurve.

The latter can be accomplished by producing a cosinusoid from thegenerator voltage and utilizing it, as shown In FIG. 19a there is showna half cycle of voltage from a generator output. In FIG. 19h, there isshown a cosine wave derived from the Wave of FIG. 19a with `no offset.In FIG. 19C there is shown the same cosine wave with an offset wherebythe gate threshold is at the crossover point of half cycles of thecosinusoid. In FIG. 19d, there is shown a cosinusoid wave with an offsetwhereby the gate threshold is at the most negative point of the wave. Itis seen from FIGS. 19e and 19d that if a cosinusoid having the samefrequency as the generator output is varied up and down with an offset,the point at which the switching device is actuated can readily bevaried from 0 to 180. Thus, if the cosinusoid is added to the oscillatorwave as shown in FIG. 18, the firing angle can be made to progresssmoothly'from conduction periods of 0 to full conduction and back to 0as the curve rises and falls.

To obtain such performance, gate thresholds and magnitudes are set ashas been described in connection with FIG. 18. In FIG. 18, the amplitudeof the oscillator Wave, is taken to be one, the amplitude of thecosinusoid taken to be one-half and the amplitudes of the positive andnegative gate thresholds, respectively, are plus and .from the computershown in FIG. 3.

minus one-half. With this arrangement, there is enabled a variation ofconduction angle in the switching device as a function of theinstantaneous oscillator wave magnitude.

It is also desired to shape the firing curve as a function of load andpower factor to produce the best sine wave output from the filter. It isrealized that a modulator and a frequency conversion stage (FIG. 1)together provide a power amplifier of considerable power gain as shownin FIG. 20. Parts `of the converter are extremely non-linear but theoperation desired is thatkof a high power linear amplifier. To linearizethe power amplifier, feedback is utilized such as shown in FIG. 21. Withfeedback, the power gain is reduced. However, the obtainable power gainwith switching devices is very great. Accordingly, the power of thereference voltage may be small proportionately.

The feedback signals obtained `from the output voltage (FIG. 21) may beconsidered as consisting of two parts; a first type feedback comprisingthe fundamental output frequency and its harmonics and a second typefeedback comprising the modulated ripple voltage derived from themultiple switching of the generator voltages. The system describedherein operates reasonably well with only the first type of feedback.This feedback regulates the voutput voltage and improves the Wave shapesomewhat.

I-Iowever, when the second 'type feedback is also utilized, the outputwave shape is greatly improved and the stability margin is improved,this improvement of the stability margin permitting the first typefeedback to be appreciably increased. When the second type feedback isutilized by itself, it effects an appreciable improvement in wave shapealthough the voltage regulation is not as complete as may be desired.Thus, the combination of both types of feedback give the best overallresults.

The second type of feedback is helpful in improving wave shape becauseit is carrying intelligence to each switching device7 i.e., each siliconcontrolled rectifier. The steep slope of such modulated ripple makes itseffect very definitive. The second type feedback is especially helpfulin correcting wave shape with a low power factor load.

Thus, with feedbacks as set forth, a sine wave input from the generatorand filtering, the needed shaping of the firing curve for the switchingdevice to produce a sinusoidal power output for a minimum filter size isobtained for any load condition. It is to be noted that using both typesof feedback provides the following advantages:

(1) The feedback shapes the output wave to correspond closely to the'oscillator wave input, the voltage regulation function being obtainedautomatically with a response time of much less than a cycle of thepower output sine wave.

(2) Since the feedback has in effect provided a linearized amplifier,thepower output waveform closely conforms to any input referenceoscillator waveform of any frequency up to a fraction of the relativelyhigh generator frequency. With this arrangement, high power squarewaves, sawtooth waves and other complex waveforms are obtainable.

Referring now back 'to the modulator depicted in FIG. 5, itis seen thatexpression produces the cosine of el.

Applied as inputs to D.C. amplifier 102 through resistors 98 and 100arethe signals e1 and ,-e' as derived Produced at the output ofamplifier 102 is the signal -er which is the negative voltage across asimulated back to back silicon controlled rectifier pair, er being equalto el-e'. The signal -eI is the negative of a voltage proportional tothe current from the output of phase el and is the -rl signal from thecomputer in FIG. 3.

To understand the relationship of the circuit of FIG. to the system ofFIG. l, it is to be understood that there is shown in FIG. 5 only aportion of a modulator for mixing one of the generator outputs, forexample, the e1 output with a phase output of the reference voltageoscillator. The portion of the modulator shown in FIG. 5 determines thefiring schedule for a back to back pair of switching devices in circuitwith the e1 phase output of the generator. By the term back to back pairof switching devices is meant a pair of switching devices where one isswitched into conductivity during the positive half of a cycle of agenerator output and the other is switched into conductivity during thenegative half of such cycle. Thus, the back to back pair of devices, oneof which is conveniently designated as Rp, i.e., the device which isswitched into conductivity during the positive half cycle of a generatoroutput, and the other of which is designated Rn, i.e., the device whichis switched into conductivity during the negative half cycle of the samegenerator output are suitably in circuit with a generator output such asel to effect such switching. The devices 'that are simulated are siliconcontrolled rectifiers.

To provide a single phase output of a system, each modulator, therefore,would include a circuit such as shown in FIG. 5 for each back to backpair of switching devices, the number of each back to back pair ofswitching devices being determined by the number of balanced phaseoutputs respectively from the generator. Thus, for each phase of systemoutput, i.e., outputs having the frequency and phases of the outputsreference oscillator, there would be required a modulator, eachmodulator comprising a number of circuits such as that depicted in FIG.5, such number being equal to the number of back to back pairs ofswitching devices in the frequency converter for each stage, i.e., thenumber of different phase outputs of the generator.

The eM signal is supplied to a neutral zone circuit comprising seriesconnected unidirectional potential sources 101 and 103 in shunt with theseries connected diodes 165 and 167, the -eM signal being applied to thejunction 169 of the cathode of diode lltt' and the anode of diode 1115.There is taken from the junction 111 of sources 101 and 103, the signal-eM.

The signal eG1 which is the el output of the computer of FIG. 3 isapplied to an input sensing amplifier 1453. Sensing amplifier 1% issuitably an amplifier which normaiiy provides approximately zero voltsoutput when the input `thereto is less than zero and a minus voltage,say about -6 volts when the input is equal to or exceeds zero volt.Consequently, amplifier 16S inveits the eGl voltage and the outputthereof is a square wave which is at a minus voltage when em is positiveand at Zero volt when eGl is negative. If zero Volt at the output ofamplifier 108 is taken to be a binary one, and the minus voltage, suchas about -6 volts, is taken to be a binary zero, then the output ofamplifier 19S may be designated as the signal The signal is applied to alogic stage 110 which may be designated a NAND circuit, the latter beingthe type logic circuit generally used in the circuit of FIG. 5. In theNAND circuit 1MB, a zero input thereto provides a minus volts output(binary zero), and a minus volts input thereto provides a zero voltoutput (binary one). The equations for the function of a NAND circuitmay be Written as x=+i JCL-W and -0E=ab wherein x is the output and aand b are inputs. Consequently, the signal at the output of amplier 1618is inverted in logic circuit 111.9 to provide the signal G.

The signal -e'M is applied to a sensing amplifier 1M. Amplifier 1G4- isa circuit similar to the circuit of stage 1G53 and which provides aminus volts output when the input thereto is equal to or greater thanzero volt and a zero volt output when the input thereto is less thanzero volt. In this amplifier, accordingly, only the negative goingportion of signal `-eM is amplified and inverted to provide a signalconveniently designated as Mp which is the basic ring signal for thepositive controlled switching device RD.

The signal -eM is also applied to a sensing amplifier 166 wherein thenegative portion of the signal eM is clipped and only the positive goingportion is inverted and amplified to provide the signal convenientlydesignated as iw The signal fn is inverted in a logic circuit 112 whichis a circuit the same as circuit 110, to provide the signal Mn which isthe basic tiring signal for the negative controlled switching device.Circuit 106 is one wherein a zero volt output (binary one) is producedwhen the input thereto is equal to or less than zero Volt and a minusvolts output (binary zero) is produced when the input thereto exceedsZero volt.

The -er signal is applied to an input sensing amplifier 114 similar tothat of stages 104 and 108 wherein the negative portion of the signal eris clipped and the positive portion is amplified and inverted to providethe signal i'. Signal r is inverted in a logic circuit 116 which is thesame as the circuits of the other logic stages, such as stages and 112,to provide the signal The signals G-r, Mn and are applied to a logiccircuit 11S to provide at the output thereof the signal @MDT and the G,Mp and r signals are applied to a logic circuit 12@ to provide at theoutput thereof the signal GMpr.

The @M1117 signal is applied through a differentiating circuitcomprising a series connected capacitor 122 and a parallel connectedresistor 12d and thence through the cathode to anode path of a diode 126to provide sharp negative pulses occurring at the leading edges of thepulses fed tinto the differentiating circuit, these sharp pulses beingapplied to an amplifier 12d. The output of amplifier 128 energizes relayRn which is the negative controlled switching device of the .back toback pair of switching devices to effect the closing of normally opencontacts Rm.

The e1 signal which is the -ril signal provided from the circuit of FIG.3 and is the negative of a voltage proportional to the current from thee1 generator output voltage is applied to a sensing amplifier 130. Suchsignal can be applied to sensing amplifier 130 since the energization ofswitching device Rn by amplifier 128 has caused normally open contactsRm associated therewith to close. Sensing amplifier 130 comprises acircuit which provides a binary one output (zero volt) when the inputthereto is equal to or less than zero volt and a binary zero output(such as -6 volts) when its input is greater than Zero volt.Accordingly, in sensing amplifier 130, the negative portion of the -esignal is clipped and the positive portion is amplified and inverted.The output signal of sensing amplifier 130 may be designated as In andis negative whenever current fiows through switching device Rn. This Insignal when applied to amplifier 128 maintains switch ing device Rn inits energized state after the negative pulse from diode 126 decays.Switching device Rn becomes deenergized when the current signal -eI diesout. The latter deenergization occurs before the next negative pulsefrom diode 1.26.

The GMpr signal is differentiated by a series connected capacitor 132and a parallel connected resistor 134 and the differentiated signalsresulting therefrom which comprises a train of sharp negative pulsesoccurring at the leading edges respectively of the pulses from theoutput of logic circuit 12.@ are applied through the cathode to anodepath of a diode 136 to a sensing amplifier 138. Sensing amplilier 1333is a circuit which provides a binary one output (zero volt) when theinput thereto is negative and a binary zero output such as -6 volts whenthe input thereto is equal to or more than zero volt.

It is to be understood that in the signal designation, the term Rnsignifies the energized state of the switching de- 9 vice Rn, and theterm signifies the energized state of switching device Rp.

It is seen that 'the signal GMpr is the negative of the expression whichis required to tire the positive controlled switching device RD (as willbe further explained). Thus the Rp signal is the inversion of GMprsignal. This R1D signal at the output of sensing amplifier 138 isinverted in an amplifier 140 which is a circuit the same as amplifier128. The Rp signal which is a binary one or Zero volt output causes thedeenergization of switching device Rp. Accordingly, when it is sodeenergized, the -peI signal is applied to sensing ampliier 138 throughnormally closed contacts Rei, the positive portion of the e1 signal isclipped and the negative portion is amplified and inverted in stage 138.This positive signal from stage 138 is inverted in amplifier 140 toprovide Zero output therefrom and relay R13 is held deenergized untilthe current from the -eI signal falls to Zero.

ln FIG. 6 there is shown the arrangement for combining the signals forenergizing devices Rn and Rp. It is seen from this figure that when theRn signal is present, the Rm normally open contacts close and currentilows through relay coil R1 and when the Rp signal is present, Rp isdeenergized and the normally closed contacts Rpl remain closed andcurrent also iiows through relay R1.

In FIG. 7 there is shown a circuit suitable for use as the sensingampliiiers of stages 104, 108 and 114 of FIG. 5. In this circuit, theinput is applied to the base 144 of a PNP transistor 142 through aresistor 146. Base 144 is connected to a positive potential source 148through a resistor 150, the emitter 152 is connected to ground and thecollector 154 is connected to a negative potential source 158 through aresistor 156. A plurality of outputs may be taken at collector 154.

Transistor 142 is biased for operation whereby with an input equal to orgreater than Zero Volt applied at base 144, the output at collector 154has a minus volts value, suitably about -6.0 volts (a When the input atbase 144 is less than zero volt, the output at collector 154 is aboutZero Volt (a l).

In FIG. 8, there is shown a circuit suitable for use as the sensingamplifier of stage 106 in FIG. 5. In this circuit, the input is appliedthrough a resistor 160 to the base 164 of a 'transistor 162. Base 164 isconnected to a source of negative potential 166 through a resistor 16S,and may be connected to a source of positive potential 170 yof a chosenvalue through the anode to cathode path of a diode 173 (shown in dashedlines) whereby the po- 'tential at base 164 is positively clamped to thepotential from source 170. The emitter 172 is connected to ground andthe collector 174 is connected to a negative potential source 166through a resistor 176. A plurality of out puts may be taken atcollector 174.

In the operation of the circuit of FIG. 8, transistor 162 is so biasedfor operation whereby an input at base 164 having a value of zero voltor a minus voltage provides an approximately zero volt output atcollector 174 which may be designated as a binary one. A voltage at base164 which exceeds zero volt provides a negative voltage output, suitablyabout -6 volts at collector 174, such output being convenientlydesignated as a binary zero.

In FIG. 9, there is shown a circuit suitable for use as the sensingamplifier of stage 138 of FIG. 5. In this circuit the inputs are appliedto the base 180 of a PNP tran sistor 178 through resistors 182 and 184respectively, base 180 being connected to a source of positive potential186 through a resistor 188. The emitter 190 is connected to ground andthe collector 192 is connected to a negative potential source 194through a resistor 196.

In this circuit, transistor 178 is so biased for operation whereby uponthe application of a voltage which has a value less than zero Volt tobase 180, an approximately zero volt output is produced at collector192, such output being conveniently designated as a binary one. Wherethe voltage applied to base 180 is equal to or greater than zero, `thereis produced at collector' 192, a voltage which has a minus value,suitably -6 volts and which may be conveniently referred to as a binaryZero. The logic equation for the circuit of FIG. 9 may be described asx=+b wherein x is the binary one output and a and b are separate binaryzero inputs, the b input actually being an analog quantity where b=l(binary) when its voltage is equal to or greater than zero volt and b=0(binary) when it is a negative voltage.

In a circuit of FIG. l0, there is shown a sensing amplifier suitable foruse in stage of FIG. 5. In this ycircuit, the inputs are applied throughresistors 206 and 208 to the base 202 of a transistor 198, base 202being connected to a source of negative potential 210 through resistor212. The emitter 200 is connected to ground and the collector 204 isconnected to source 210 through a resistor 214.

Transistor 198 is so biased for operation whereby when the input to base202 exceeds zero volt, the output at collector 204 is a negative voltagequantity, such as about -6 volts (binary 0). When the input to base 202is equal to or less than zero volt, the output at collector 198 is aboutzero volt, i.e., a binary one. The logic equation for the amplier ofFIG. 10 may be stated as xz-H. The b voltage input is an analog quantityand may be defined as: b=l (binary) when its value exceeds zero volt andb=0 (binary) when its value is equal to or less than zero volt.

The circuit of FIG. ll is suitable for use as a circuit in the logicstages of FIG. 5 such as stages 110, 112, etc. Such circuit isconveniently designated as a NAND type which in effect includes an ANDfunction followed by a NOT function or negation. In this circuit, the aand b inputs are applied through resistors 240 and 242 to the base 246of a transistor 244, base 245 being connected to a positive potentialsource 248 through a resistor 250. The collector 252 is connected to anegative potential source 254 through a resistor 256 and the emitter iscon nected to ground. The equations for the circuit of FIG. l1 may bestated as output x---i-, x=a and 5::1-19.

In FIG. l2, 'there is shown a circuit suitable for use in the amplifierstages 128 and 140 of FIG. 5. In this circuit, the inputs are appliedthrough resistors 224 and 226 to the base 218 of a PNP transistor 216.The emitter 220 is connected to ground and the collector 222 isconnected to a source 228 of negative potential through the switchingdevice being actuated and depicted as a relay coil 230, coil 230 beingsbunted by the cathode to anode path of a diode 231 to clamp collector222 at the potential of source 228 and to eliminate inductance surge.The base 218 is connected to a source of positive potential 234 througha resistor 232.

In this circuit, transistor 216 is so biased for operation whereby anegative input to base 218 provides current through coil 230 whereby itis energized. The logic equations in the circuit of FIG. 12 may bewritten as, R=E+l and R`=ab wherein R signifies the energized state ofcoil 230 and signifies the deenergized state of coil 230. Utilizing thedesignati-on ot the signals as shown in connection with amplifier 128 inFIG. 5, 'then the logic equations for the circuit oi FIG. l2 becomes R=GMn`-}-InRn, since the input to amplifier 128 is @Mii-Tn.

Reference is now made to the circuit of FIG. 5 for an explanation of theoperation thereof. It is recalled that the function of this circuitisrto provide a schedule for firing switching devices Rn and Rpschematically depicted as relay coils but together behaving as a back toback pair of switching devices such as silicon controlled rectiiers,thyratrons and the like.

The contacts designated R1 in the circuit of FIG. 2 and the two pairs ofcontacts R1 shown at the input at intell grator 62 in the circuit ofFIG. 3 depict the equivalent of the oneration of a back to backswitching device pair.

The input signals to the circuit of FlG. as previously explained arereceived from the circuit of FiG. 3. They are e1=eG1=one generatorvoltage phase. The term -eM=the resultant of the mixing of the one phaseof the output of oscillator 9% and the cosinusoid of e1 (in thisexample, one half voltage e1 plus e3), and the providing of twothresholds by clipping out the mid-region of the eM signal by theneutral zone circuit. The signal er is the negative of the voltageacross a switching device pair where ep equals e1-e. rThe voltage -e isthe negative of a voltage proportional to the current from the outputphase e1.

These analog input signals are fed into sensing amplifiers which convertthem to onofi, i.e., digital signals. The latter digital signals aremixed and fed through logic arnpliers until the final result is theoperation of the output switching device pair (Rn and Rp) in FIG. 5.

As previously explained above, two digital states are described asbinary one and binary zero. Binary one signiiies the presence of asignal and is a state when the circuit voltage is approximately zerovolt. The binary zero state signifies the absence of a signal and existswhen the voltage is approximately a suitable negative voltage such asabout -6 volts.

The conditions for the operation of switching device Rp which mayrepresent a silicon controlled rectifier having its anode connected tothe e1 generator voltage, ie., it may represent the positive controlledrectifier in a back to' back pair and for the operation of switchingdevice RIl which may represent a silicon controlled rectifier having itscathode connected to the e1 generator voltage, i.e., it may representthe negative controlled rectifier of the back to back Pair are asfollows:

Conditions fOr Eecling Condnclion in Positive Controlled Device RpPositive tiring signal is present Mp (Derived from input -eM); and theswitching device pair voltage is positive r Derived from -e1.; and Thegenerator voltage ecd (same as e1) is positive; G or current i1 ispresent and positive Ip (The Ip signal can only be true if the contactsRpl assosociated with the positive controlled rectifier are closed andcurrent starts to fiow (derived from -ep).)

Conditions fOr Efecting Conduction in Negative Controlled Device RnNegative firing signal is present M (derived from -eM); and

Switching device pair voltage is negative (i.e., anode of the negativecontrolled silicon controlled rectifier would be positive, derived from-e1.);

and

Equation 4 stands for the proposition that relay R1 (FIG. 6) is actuatedwhen signals Mp and r and G are concurrently present or have beenpresent (to produce Rp) and Ip is present or the signal Mn is presentand concurrently the signals r and g are not present, or this combina- 2tion has been in existence to produce Rn) and the signal In is present.

In connection with Equation 4, it is to be noted that the Ip and Interms do not cause the actuation of relay R1 since the currentsresponsible or these terms cannot flow until the relay Rl is alreadyactuated. Thus, these terms function to hold relay R1 actuated until thecurrent drops to zero. This is a characteristic inherent in a switchingdevice such as a thyratron or a silicon controlled rectifier R1 of FIG.3.

ln the circuit of FIG. 5, as has been set forth hereinabove, inputvoltage eG1 may vary widely in frequency but in general is many timesgreater than the reference voltage frequency from oscillator gli andconsequently, equally many times greater than the output frequency ofthe system. The eGl signal is amplified and inverted by sensingamplifier lfl. Since the voltage to switch amplifier 168 on and ofi maybe chosen to be relatively small, such as about one volt, compared tothe magnitude 0f the em voltage, the output of amplifier ltii isessentially a square wave and is negative (binary zero) when voltage eGlis positive and positive (binary one) when voltage eGl is negative. Thisprovides the signal il appearing in Equations 2 and 4 above. The Gisignal is inverted in logic circuit lll@ to produce the signal Gappearing in the Equations l and 4.

The input sensing amplifier lilo amplifies and inverts only the positiveportion of the -e'M voltage and its output accordingly becomes hin orthe inverse (negative). The n signal is inverted by logic circuit i12 toproduce the Mn signal which is the basic firing angle signal for thenegative controlled switching device.

The signal -e'M is also fed into the sensing amplifier wel whereby onlythe negative going portion of the -eM signal is amplified. The output ofamplifier 14M is the signal Mp which is the basic firing signal for thepositive controlled switching device.

The signal en i.e., the voltage across a back to back pair of switchingdevices is amplified and inverted by sensing amplifier 114 to producethe signal r which is inverted in logic circuit 116 to provide thesignal The signals Mn and are fed into logic circuit lltl to produce thesignal @lt/fn?. From Equation 2 it is seen that this is negative of aterm required to actuate the negative controlled switching device.

The differentiating circuit comprising capacitor 122 and resistor 124produces short duration negative going pulses at the leading edges ofthe wider pulses ied into the differentiating circuit. Each of thesenegative going pulses are amplified in amplier 28 and the output thereofactuates switching device Rp representing conduction therein. Thecontacts Rm associated with switching device Rn close upon theenergization of device Rp to permit the signal -eI to be fed intosensing amplifier 13b. Since amplifier i3@ is biased for operationwhereby it only amplifies positive signals, the output of amplifier isthe signal in. This signal is negative whenever the negative current isliowing and is the correct polarity to hold the switching device Rpactuated even after the negative pulse from the differentiating circuitdecays. After the signal e1 decays, device Rp becomes deenergized, suchdeenergization occurring prior to the next pulse from the output of thedifferentiating circuit.

The signals G, Mp, and r are fed into logic circuit llt).

its output is according to GMpr. This term is the negative or theexpression required to fire the positive controlled switching device asshown in Equation l. The signal the open or deenergized state of deviceRp and term p represents its actuated state. When switching device Rp isin the deenergized state, the normally closed contacts Rm associatedtherewith permit the application of the el signal to sensing amplifier138. Since this amplifier only senses the negative portion of the signal-eb such sensing is the correct polarity for the -eI signal to holddevice Rp in the unactuated state until the current drops to zero. Thewave shapes of signals at the various points in the circuit of FIG. areshown therein.

In FIGS. 13-16 taken together as in FIG. 17 there is shown ka depictionof another embodimentof a system according to the invent-ion whereinsilicon controlled rectifiers are utilized as the switching devices toprovide frequency conversion. These FIGS. show the details of amodulator for providing one of three phase power outputs from thesystem, viz., the phase A output. It is, of course, to be realized thatmodulators similar to those utilized in providing the phase A output areutilized to provide the phase B and phase C outputs. l

In FIGS. 13l7, generator 30) provides the outputs eGl, @G2 and am, theseoutputs being 120 displaced in phase with respect to each other. Thefield coil 332 for generator 33t) is energized by an exciter'3tl4 whichmay suitably be of the static type. The three generator outputs are fed.back to a voltage regulator contained in stage 334 for providingvoltage regulation of the outputs of the generator.

The primary winding 309 of a transformer 310 is connected between theeGz and eG3 output lines, the voltage appearing at the upper terminal ofa center-tapped secondary winding 311 being applied to summing point 312through a resistor 314. The windings of transformer-31tl are so poledwhereby the waveform appearing at surnminingpoint 312 is 90 displaced inphase with respect to the em signal, i.e., the eGl cosinusoid which isutilized to establish the firing schedules for the silicon controlledrectifiers associated with the eed output of generator 30).

Also, applied to ythe summing point 312 through a resistor 316 is thephase A output of a three phase sine wave reference oscillator and phasesplitter 32). Oscillator 320 is chosen to have a range of determinablefrequencies which is the desired output range of frequencies, thehighest frequency of such range being substantially less than the lowestfrequency provided from the output of generator 34M). The oscillatoroutput for summing point 312 is taken from the lower terminal of thesecondary winding of transformer 3243A.

Also applied to the summing point 312 through a resistor 318 is thephase A system output, such output being applied from an autotransformer322 to provide analog feedback as an input to the modulator. It isunderstood that the signal appearing at summing point 312 is utilized toproduce the gating signal for the positive controlled silicon controlledrectifier 434i associated with the eGl generator output. By the termpositive controlled is meant that silicon controlled rectifier 400 isgated into conductivity during a positive half cycle of the eG1generator output.

To provide a similar signal such as that appearing at junction point 332in order to produce a gating signal for the negative controlled siliconcontrolled rectifier 404 associated with the @G1 generator output, thesignal appearing at the lower terminal of secondary winding 311 oftransformer 310 is applied to summing point 330 through a resistor 326.The signal appearing at thepolarity dot terminal of the secondarywinding of transformer 320A is applied to point 33t) through a resistor324 and the signal appearing at the undotted terminal of autotransformeris applied to point 33t? through a resistor 328.

It is seen that the signal at summing point 330 is of the oppositepolarity as the signal appearing at summing point 312 because of thepoling of secondary winding 311, the poling of the secondary winding oftransformer 320A and the poling of autotransformer 322.

titl

The signal appearing at junction point 312 is applied to the base 334 ofa transistor 332, transistor 332 having an emitter 336 connected toground and a collectory 337 connected to a source of positive potential339 through a resistor 336. The base 334 is connected to positivepotential source 339 lthrough a resistor 340 and is negatively clampedto ground through the cathode to anode path of a diode 3,42. The valuesof the circuit components associated with transistor 332 are suchwhereby in the quiescent state, base 334 is positively biased andtransistor 332 conducts at saturation but when current into base 334goes slightly negative, [transistor 332 is rendered nonconduetive. Theoutput appearing at collector 337 is applied diirectly to the collector354 of a transistor 350 as willy be further explained hereinbelow. i

Applied to the base 345 of a transistor 344 through a resistor 346 isthe voltage appearing at the anode 402 of silicon controlled rectifier44N? and also applied to base 345 through a center tapped winding 348and a resistor 347 is the signal appearing at the cathode 401 of siliconcontrolled rectifier 4tltl. In transistor 344, the collector 349 isconnected to the positive source 339 through a resistor 351, the emitter353 is connected directly to ground and the base 345 is connected toground through the cathode to anode path of a diode 355, diode 355serving to negatively clamp to ground base 345. The output appearing atcollector 349 is applied to base 352 of transistor 353.

It has been stated above that the output of collector 337 of transistor332 is directly applied to collector 354 of transistor 35i). Intransistor 350, the emitter 356 is connected to ground and the base isconnected to a negative potential source 353 through a resistor 360.Also applied to base 352 through a resistor 362 is an output of areverse current restraining or inhibit circuit 398, such circuitproviding a positive output when current is still flowing in thenegative controlled rectifiers as will be further explained hereinbelow.

The output at collector 354 is applied through series connectedcapacitor 364 to the base 36S of a transistor 366.

In transistor 3&6, the emitter 370 is connected to ground, a seriesarrangement of resistors 372 and 374 being connected between ground andnegative source 35S. The base 363 is connected to the junction 373 ofresistors 372 and 374 through the series arrangement of a feedbackwinding 376 of a blocking oscillator transformer 373 and a resistor 377.The collector 380 is connected to positive source 333 through theparallel combination of a winding 379 of transformer 378 and the seriesarrangement of a resistor 332 and the anode to cathode path of a diode384. The upper terminal of winding 331 of transformer 378, i.e., thepolarity dot terminal is connected to the gate electrode 433 of siliconcontrolled rectifier 46u through a resistor 336 and the lower terminalof winding 381 is connected to the cathode 431 of silicon controlledrectier 433.

yConsidering the operation of that portion of the modulator required toprovide the gating signal for silicon controlled rectifier 493, viz,transistors 332, 344, 35u, and 366 and their associated circuitcomponents, the voltage from the reference oscillator applied throughresistor 316 to summing point 312 produces a current at the summingpoint which may suitably be designated as -IF. The cosine timing waveapplied through resistor 314 to summing point 312 produces a currentthereat which may be suitably designated as IAO The sum of these twocurrents analogous to the voltage eM of FIG.` 5, has a similar phaseexcept that it is of the opposite polarity. The analog feedback signal,which contains both the fundamental output frequency and its harmonicsand the modulator ripple voltage derived from the multiple switching ofthe generator voltages and applied to summing point 312 through resistor318 provides a current, I0, at summing point 312 in accordancetherewith.

Since transistor 332 is arranged to conduct at saturation when its baseis substantially at zero volt or slightly higher (0.5 volt) and to benonconductive at a voltage slightly below zero volt (such as 0.5 volt) anegative signal appearing at summing point 3l2 renders transistor 332nonconductive whereby the positive potential appearing at collector 337is applied to collector 354 of transistor 350.

In transistor i?, the negative potential applied to base 352 throughresistor 36h provides a negative DC. threshold. In transistor 344-, tobase 345 there are supplied through resistors 346 and 3ft-7respectively, currents in accordance with the signals appearing at theanode 402 and cathode itil of silicon controlled rectifier fitti). Theoutput at collector 349 of transistor 344 is negative only when @G1output of generator 313i? applied to anode 402 of silicon controlledrectifier lili@ is positive with respect to cathode 401. Since thesignal appearing at base 345' refiects the difference between thevoltages at anode 492 and cathode lill of silicon controlled rectifier469, in the event that such voltage at anode 492 is positive withrespect to the voltage on cathode 431, then transistor 344 is renderedconductive to provide essentially a zero Volt output at collector 349.In the event that the voltage at anode 432 is negative with respect tocathode dill, then transistor 341i is rendered nonconductive and theoutput at collector 3039 is positive. Accordingly, transistor 3ft-45provides a reverse polarity inhibit feature, such arrangement permittingthe gating pulse for silicon controlled rectifier lt-tltl to occur onlywhen the voltage applied to anode 402 is positive. The signal producedat collector 349 of transistor 344 is analogous to the signal producedin the modulator of FIG. 5.

It is seen that in the event the voltage at anode 402 of siliconcontrolled rectifier 410i) is not positive whereby transistor 344 isnonconductive and transistor 35) is consequently heavily conductive,collector 354 of transistor 350 short circuits to ground the outputappearing at collector 337 of transistor 332 so that no positive signalscan be produced.

Capacitor 364 is included to provide short duration pulses which areproduced at the begining of each pulse period of the signal. Transistor366 and windings 376, 379 and 381 provide a blocking oscillator, suchblocking oscillator operation being provided by the feedback winding376. Diode 384- is included for transient suppression so that aninductance surge will not cause the voltage at collector 389 to exceedbreakdown. It is appreciated that in the evennt that the output ofcollector 380 is near zero voltage, then a positive pulse appears at thepolarity o dot terminal of winding 38I to gate silicon controlledrectifier 4% into conductivity.

The voltage applied from negative source 35S to base 352 throughresistor 360 maintains transistor 350 in the nonconductive state when nosignal (positive) is present at base 352 of transistor 35i). Thispermits collector 337 of transistor 332 to go positive when the summingpoint voltage at base 334 goes negative, thus actuating blockingoscillator transistor 366 to provide output gating pulses. It isrealized that the signal on base 334 of transistor 332 and the signal onbase 352 of transistor 35@ must both be negative to allow the twocollectors 337 and 354 (connected together) to go positive and triggerthe blocking oscillator. The bias resistor 366 assures that transistor350 is nonconductive except when either of the aforesaid inputs ispositive (NOR circuit).

In FIG. 22a, there is shown the composite wave shape of the currents atsumming point 312 comprising A.C. bias current (-IAC) superimposed onthe reference oscillator current (-If) and a feedback currentproportional to the system output voltage.

The restraining circuit output signal when positive also functions torender transistor 35@ conductive whereby the blocking oscillator doesnot produce output gating pulses. It will be further explained belowthat a restraining cirliti cuit output signal reects a condition whereincurrent is still flowing in the negative controlled rectiers wherebycommutation to the positive controlled rectifiers is prevented by suchrestraining circuit output signal.

In FIG. 22]) there is shown the signal observed at collector 337 oftransistor 332 when the collector circuit of transistor 35h is opened.FIG. 22C shows the signal appearing at collector 337 of transistor 322when transistor 35@ is connected into the circuit. At first glance, itwould appear that the wave shape FIG. 22e should follow the dotted linewith the pulse remaining until the controlled rectifier polarity isreversed. However, as soon as silicon controlled rectifier lull isswitched into conductivity, the voltage across it abruptly drops down toa very small figure such as about one volt. The design of the circuitcomprising transistor 3M and its associated components is such that withso small a voltage appearing at anode 462 of silicon controlledrectifier itlil, transistor 344 is not rendered conductive and a reversepolarity inhibit signal is produced which causes the wave shape at theoutput at collector 337 to rapidly drop to zero as soon as siliconcontrolled rectifier il-titl is rendered conductive. If for any reasonsilicon controlled rectifier 400 is not rendered conductive when itshould have been, then the wave shape of the output at collector 337follows the dotted line of FIG. 22C.

The waveform of FIG. 22d shows the output of the blocking oscillatorwith its short duration pulse and the waveform of FIG. 22e shows thegenerator signal @G1 (am and @G3 have the same wave shape), the hatchedportions therein indicating when silicon controlled rectilier Alticonducts. It is to be noted that the positive controlled siliconcontrolled rectifier is essentially being switched into conductivityduring the negative half cycle from the reference oscillator output.

The portion of the modulator for providing the gating signals forsilicon controlled rectifier 404 which is in back to back relation withsilicon controlled rectifier 405i, i.e., it is controlled by thenegative half cycles of the eGl output, is the same as that portion forproviding the gating signals for silicon controlled rectifier 400, thepolarity of the secondary windings of transformers 310, 329A and 322insuring 'that the same operation occurs therein. From the waveform ofFIG. 22a, it is accordingly seen that a negative controlled siliconcontrolled rectifier is fired during the positive half cycle of thereference oscillator output.

If the portion of the modulator for providing the firing signals forsilicon controlled rectifiers 400 and 404 is considered as a separateunit, then a like pair of units is provided for providing the tiringsignals for the back to back pair of silicon controlled rectiers 406 and408 associated with the generator eG2 output and a like pair of units isprovided for producing the firing signals for the back to back pair ofsilicon controlled rectifiers 4I() and 412 which are associated with thegenerator eG3 output.

Also, the cosine wave derived from the @G2 output is provided from atransformer 3% having a primary winding 36S connected between the eesand em generator output lines, and the cosine wave derived from the eG3output is provided from a transformer 306 wherein the primary windingStill is connected between 'the eGZ output and the eGl output lines. Theupper terminals of the secondary windings 307 and 303 of transformers308 and 366 are utilized to provide the cosine timing waves for firingpositive controlled rectifiers 4% and 410 respectively. The signalsappearing at the lower terminals of secondary windings 307 and 363 areutilized as the cosine timing waves for negative controlled siliconcontrolled rectifiers 4% and 512 respectively.

Likewise, the signal at the lower terminal of the secondary winding oftransformer 320A is utilized to provide the reference voltage forsilicon controlled rectifiers 466 and 4I@ and the signal appearing atthe upper terminal of the secondary winding of transformer 320A isutilized

1. IN COMBINATION WITH A VARYING FREQUENCY POWER SOURCE HAVING A CHOSENPLURALITY OF LIKE BALANCED PHASE OUTPUTS, SAID CHOSEN PLURALITY OFFREQUENCY CONVERSION MEANS, EACH OF SAID CONVERSION MEANS COMPRISINGSAID CHOSEN PLURALITY OF FIRST AND SECOND SILICON CONTROLLED RECTIFIERS,EACH OF SAID SILICON CONTROLLED RECTIFIERS COMPRISING AN ANODE, ACATHODE AND A GATE ELECTRODE, THE ANODE OF EACH OF SAID FIRST SILICONCONTROLLED RECTIFIERS RESPECTIVELY BEING COUPLED TO ONE OF SAID POWERSOURCE OUTPUTS, THE CATHODE OF EACH OF SAID SECOND SILICON CONTROLLEDRECTIFIERS RESPECTIVELY BEING CONNECTED TO ONE OF SAID POWER SOURCEOUTPUTS; A REFERENCE VOLTAGE SOURCE HAVING SAID CHOSEN PLURALITY OFBALANCED PHASE OUTPUTS, THE FREQUENCY OF SAID REFERENCE VOLTAGE BEINGLESS THAN THE LOWEST FREQUENCY OF THE OUTPUTS FROM SAID POWER SOURCE,SAID CHOSEN PLURALITY OF MODULATING MEANS, EACH OF SAID MODULATING MEANSBEING IN CIRCUIT WITH THE OUTPUTS OF SAID POWER SOURCE AND ONE OF THEOUTPUTS OF SAID REFERENCE VOLTAGE SOURCE FOR MIXING SAID POWER SOURCEOUTPUTS WITH SAID REFERENCE VOLTAGE, MEANS FOR APPLYING THE RESPECTIVEOUTPUTS OF SAID MODULATING MEANS TO THE GATE ELECTRODES OF SAID SILICONCONTROLLED RECTIFIERS COMPRISING CORRESPONDING ONES OF SAID FREQUENCYCONVERSION MEANS, AND SAID CHOSEN PLURALITY OF MEANS FOR RESPECTIVELYCOMBINING THE OUTPUTS OF THE SILICON CONTROLLED RECTIFIERS INCLUDED INEACH OF SAID FREQUENCY CONVERSION MEANS TO PROVIDE SAID CHOOSENPLURALITY OF BALANCED PHASE SYSTEM OUTPUTS, THE CATHODES OF SAID FIRSTRECTIFIERS AND THE ANODES OF SAID SECOND RECTIFIERS BEING CONNECTED TOSAID COMBINING MEANS, EACH OF SAID LAST NAMED OUTPUTS HAVING THEFREQUENCY OF SAID REFERENCE VOLTAGE, SAID FIRST SILICON CONTROLLEDRECTIFIERS BEING CONDUCTIVE DURING THE COINCIDENCE OF HALF CYCLES OFSAID POWER SOURCE OUTPUTS AND HALF CYCLES OF SAID COMBINING MEANS OUTPUTOF ONE POLARITY, SAID SECOND SILICON CONTROLLED RECTIFIERS BEINGCONDUCTIVE DURING THE COINCIDENCE OF HALF CYCLES OF POWER SOURCE OUTPUTSAND HALF CYCLES OF SAID COMBINING MEANS OUTPUTS AND OF THE OPPOSITEPOLARITY.